Your thoughts on digital sensor size vs film format

[Arne Croell]

I've had the same thought, but unfortunately, it would require an yet-uninvented technology. What costs money is the size of the silicon wafer. The geniuses of the semiconductor world have been able to continuously improve performance and decrease costs by packing smaller and smaller circuits onto a silicon wafer (and getting more and more parts out of the same surface area). But that silicon isn't getting any cheaper, as far as I can tell.

I don't know what a 4x5" slice of silicon would cost. Probably a number that we associate more with space shuttles than cameras.

Maybe there are other semiconductor technologies in the works. Would be nice if this stopped being a hurdle.

The silicon itself is not that much of a problem. Your Intel and AMD processors as well as memory are routinely made on 300mm (12") wafers. No problem to put a 4x5" on that, even 5x7 can be done. The polished wafer before processing will cost in the vicinity of $50-150 (if you buy a few 10000 of it). Its the processing cost vs. demand that would kill it.

[paulr]

TIts the processing cost vs. demand that would kill it.

Interesting. By processing do you mean everything that gets done to turn a slab of silicon into a chip? If that's the case and if this cost scales by the square inch, then the result is effectively similar to what I said ... although it leaves some hope that "processing" could get cheaper.

[Ben Syverson]

The silicon itself is not that much of a problem. Your Intel and AMD processors as well as memory are routinely made on 300mm (12") wafers. No problem to put a 4x5" on that, even 5x7 can be done. The polished wafer before processing will cost in the vicinity of $50-150 (if you buy a few 10000 of it). Its the processing cost vs. demand that would kill it.

That's not my understanding of the situation at all.

As I understand it, the larger the IC, the greater the chance of a defect in any given IC. That's why it's cheap to make 1/2" sensors—you can cram a bunch of them on a 300mm wafer, and just throw away the few that don't pass QC. In contrast, if you can only fit one gigantic 4x5" IC on a wafer, it's virtually guaranteed to have a large number of defects.

It has nothing to do with "demand." There is huge demand for full frame 35mm sensors, yet they still cost orders of magnitude more than the sensors in compact cameras. That's because as IC area increases, manufacturing costs go up exponentially, not linearly.

[Arne Croell]

That's not my understanding of the situation at all.

As I understand it, the larger the IC, the greater the chance of a defect in any given IC. That's why it's cheap to make 1/2" sensors—you can cram a bunch of them on a 300mm wafer, and just throw away the few that don't pass QC. In contrast, if you can only fit one gigantic 4x5" IC on a wafer, it's virtually guaranteed to have a large number of defects.

It has nothing to do with "demand." There is huge demand for full frame 35mm sensors, yet they still cost orders of magnitude more than the sensors in compact cameras. That's because as IC area increases, manufacturing costs go up exponentially, not linearly.

True - but that is what I include under processing costs. If you have to reject 90%, then your pocessing cost for a working wafer is 10x that of a single wafer going through the line. Paul just talked (or so I thought ) about the material - the silicon wafer as it is supplied from a manufacturer like Siltronic, MEMC, or Shin-Etsu to Intel, Dalsa, Kodak etc. Such an unprocessed wafer is already a hight-tech product btw, to stay within its specs. And a certain number of defective sites is allowable if you map them out and interpolate in the software.

[Arne Croell]

Interesting. By processing do you mean everything that gets done to turn a slab of silicon into a chip? If that's the case and if this cost scales by the square inch, then the result is effectively similar to what I said ... although it leaves some hope that "processing" could get cheaper.

Yes, the processing cost will roughly scale with the area, and if you can divide it only over 1 or 2 sensors, it will be expensive. Of course, the sensor resolution/pixel pitch one chooses also has an influence - both on cost and on the number of defects.

[Zaitz]

I didn't see this posted. I thought it was an interesting read and was surprised at the results.
http://www.luminous-landscape.com/essays/Cramer.shtml

[Don Dudenbostel]

I'm one of those pariahs who honestly believe we are in the last age of film photography. The day will come, probably sooner than later, when film of any kind will be a rarity. There will come a time when 4x5 and larger films are simply not available at any price. On that day, there will be no more large format photography.

So stop beating this horse; it's dead. If you're a digital photographer, embrace it and get on with your photographic life. Stop trying to redefine technical terms to fit your version of reality.

Alan don't have a stroke. I'm not trying to rain on you parade. Why so defensive?

My reality is what I'm shooting at the moment. Yes I shoot digital but I shoot everything from 35mm to 8x10 and have probably shot more LF including 11x14 since 1964 than most folks here will in six lifetimes. LF was the Primary format of my business for almost thirty five years. Even though my business is digital I stll shoot LF for my pleasure and will continue as long as I can.

My question was an honest question. Sorry I asked. I'll remember to stay away from this area of the forum.

Moderator, please close the thread.

[walter23]

I've had the same thought, but unfortunately, it would require an yet-uninvented technology. What costs money is the size of the silicon wafer. The geniuses of the semiconductor world have been able to continuously improve performance and decrease costs by packing smaller and smaller circuits onto a silicon wafer (and getting more and more parts out of the same surface area). But that silicon isn't getting any cheaper, as far as I can tell.

I don't know what a 4x5" slice of silicon would cost. Probably a number that we associate more with space shuttles than cameras.

Maybe there are other semiconductor technologies in the works. Would be nice if this stopped being a hurdle.

Isn't the main cost of silicon not the price of the material itself but the need for it to be very high grade / free of defects? It seems to me you could have a much lower defect rate by simply using a larger scale process (bigger features on the chip itself) - ie features on the chip that are large enough (pixel sites and electronic traces) that they wouldn't be impacted as much by minor defects.

I don't know much about silicon chip and sensor technology but I *think* that the smaller your process is, the more rejects you get... high density sensors, chips, etc, are the big culprit.

This is all kind of lay speculation and I'd be happy to hear something more conclusive one way or the other.

[paulr]

Isn't the main cost of silicon not the price of the material itself but the need for it to be very high grade / free of defects? It seems to me you could have a much lower defect rate by simply using a larger scale process (bigger features on the chip itself) - ie features on the chip that are large enough (pixel sites and electronic traces) that they wouldn't be impacted as much by minor defects.

I'd be curious to hear an answer to that from someone who knows more about the subject. What makes me skeptical is that I don't think we ever see manufacturers using this concept to make cheap chips. They seem to go smaller, smaller, smaller, using whatever newest/smallest fabrication process they can get their hands on.

it's possible that i'm missing something. At any rate, a 4x5 sensor with a 12 micron pixel pitch should give you something like 40 lp/mm on the sensor at high MTF.

In terms of ultimate quality, I bet it wouldn't be as good as the best phase one backs and shneider/rodenstock digital lenses (lenses that cover 4x5 don't perform remotely as well). But if it could be cheap--the big question--it would be an interesting option.

[Arne Croell]

Isn't the main cost of silicon not the price of the material itself but the need for it to be very high grade / free of defects? It seems to me you could have a much lower defect rate by simply using a larger scale process (bigger features on the chip itself) - ie features on the chip that are large enough (pixel sites and electronic traces) that they wouldn't be impacted as much by minor defects.

I don't know much about silicon chip and sensor technology but I *think* that the smaller your process is, the more rejects you get... high density sensors, chips, etc, are the big culprit.

This is all kind of lay speculation and I'd be happy to hear something more conclusive one way or the other.

Essentially yes - but the price range I quoted for a wafer was already for the "perfect" silicon wafer, of course dislocation-free, with tightly specified types and amounts of point defects, "warp", "bow", oxygen content etc. Other wafers, e.g. for solar cells, have to be much cheaper. If someone wants to read up on some of the issues, every second year there is a new "roadmap" for semiconductor technology by the ITRS (http://www.itrs.net/). An executive summary from 2009 is here: http://www.itrs.net/Links/2009ITRS/2...09_ExecSum.pdf

Btw, that summary lists the transition to 450mm wafers in production for about 2014/15 - theoretically one could make an 8x10 or even larger sensor with it.